ARM Processor - Seminar Report

INTRODUCTION

                     The ARM processor is a 32-bit RISC processor, meaning it is built using the reduced instruction set computer (RISC) instruction set architecture (ISA). ARM processors are microprocessors and are widely used in many of the mobile phones sold each year, as many as 98% of mobile phones. They are also used in personal digital assistants (PDA), digital media and music layers, hand-held gaming systems, calculators, and even computer hard drives.

                   

                     The first ARM processor-based computer was the Acorn Archimedes, released in 1987. Apple Computer became involved with helping to improve the ARM technology in the late 1980s, with their work resulting in the ARM6 technology in 1992. Later, Acorn used the ARM6-based ARM 610 processor in their Risc PC computers in 1994. Today, the ARM architecture is licensed for use by many companies, including Apple, Cirrus Logic, Intel, LG, Microsoft, NEC, Nintendo, Nvidia, Sony, Samsung, Sharp, Texas Instruments, Yamaha, and many more. The latest developed ARM processor families include ARM11 and Cortex. ARM processors capable of 64-bit processing are currently in development. The advantage of RISC is in the simplicity (in terms of processor resource consumption) of the instructions and processing time. Each instruction takes only single clock cycle. Overall power consumption is very less. Due to this fast response, low power consumption and coding flexibility, RISC architecture is highly suitable for embedded systems. However there is one drawback with RISC, that is the instruction set code is longer and takes more memory. This issue is no more a concern with the growth in the memory technology.

FEATURES OF ARM:

• There are 37 registers of 32 bit wide in this processor core. 16 registers are available for the  programmer. 
• It's pipeline architecture; that is 3 instructions are processed simultaneously at 3 different stages. 
• The bus architecture is of Von Neumann type where single 32-bit data bus carry both instructions  and data. 
• The data-types can be of 8 bit /16 bit/32 bit wide. 
• Processor can run on seven different modes based on the application requirement. 
• Has built in 32x8 multiplier and a 32 bit barrel shifter (both needed much for DSP functionality)
• This processor can also execute another instruction set called THUMB state (16 bit) to give the  programmer an option to use this processor like CISC processor. The total instruction set can be tidier and takes less memory space.

ARM Core Diagram                                         

Instruction Decoder and Logic Control: The function of instruction decoder and logic control is to decode instructions and generate control signals to other parts of processor for execution of instructions.

Address Register: To hold a 32-bit address for address bus.

Address Increment: It is used to increment an address by four and place it in address register.

Register Bank: Register bank contains thirty one 32-bit registers and six status registers.

Barrel Shifter: it is used for fast shift operation.

ALU: 32-bit ALU is used for Arithmetic and Logic Operation.

Write Data Register: The processor put the data in Write Data Register for write operation.

Read Data Register: When processor reads from memory it places the result in this register.

OPERATION MODE:

ARM operates in six different modes as followings:

1. User Mode: Use for normal operation.

2. IRQ Mode: This Interrupt mode is designed for handling interrupt operations.

3. Supervisory Mode: Used by operating system.

4. FIQ Mode: Fast Interrupt mode.

5. Undefined Mode: When an undefined instruction executed.

6. Abort Mode: This mode indicates that current memory access cannot be completed, such as when data is not in memory and processor require more time to access disk and transfer block of data to memory.

ARM REGISTER :

ARM7 has 31 general registers and 6 status registers. At user mode only 16 registers and one Program Status Register (PSR) are available to programmers. The registers are labeled R0 through R15. R15 is used for program counter and R14 is used for link register.Each register is 32 bits in size. The registers are roughly divided into:

30 General Purpose Registers: Only 15 GPRs are visible any one time depending on the mode of operation and are numbered R0-R12, Stack Pointer and Link Register. While the stack pointer is essentially used by the compliers like those of C/C++, its use as any other GPR is deprecated. Link register stores return addresses in subroutines or exceptions depending on the mode of operation.

Program Counter: Loads the address of destinations on branching operations and may be manually set while doing subroutine calls.

Application Program Status Register: It contains a copy of flags from the ALU to check if the conditional instructions were executed.

Current Program Status Register: It holds various information regarding APSR, current processor mode, interrupt flags, execution state bits etc.

Saved Program Status Register:  In case an exception is detected, this register holds the values of the CPSR.

PROGRAM STATUS REGISTER (PSR):

This register is used to store control bits and flag bits. The flag bits are N, Z, C and V, and the control bits are I, F, and M4 through M1. The flag bits may be changed during a logical, arithmetic and compare operation.

Flag Bits

N (negative): N=1 means result of an operation is negative and N=0 means result of an operation is positive.

Z (zero): Z=1 means result of an operation is zero and Z=0 result of an operation is not zero.

C (carry): C=1 means result of an operation generated a carry, and C=0 means result of an operation did not produce a carry.

V (overflow): V=1 means result of an operation generated an overflow and V=0 means result of an operation did not generate an overflow.

Control Bits

I (interrupt bit): When this bit set to one, it will disable the interrupt and this means the processor does not accept any software interrupt.

F bit is used to disable and enable fast interrupt request mode (FIQ) mode.

M4, M3, M2, M1 and M0 are mode bits and they are equal to 10000 for user mode.

T (State bit):  T=1 Processor executing thumb instructions, T=0 processor executing ARM instructions

APPLICATIONS:

• Is used extensively in consumer electronics including personal digital assistants (PDAs). 
• Tablets.
• Mobile phones.
• Digital media and music players.
• Hand-held game consoles, calculators.
• Computer peripherals such as hard drives and routers.