Abstract
Organic thin-film transistors
OTFTs have received considerable attention recently because they can be
fabricated at reduced temperature and potentially reduced cost compared to
hydrogenated amorphous silicon thin-film transistors. Low fabrication
temperature allows a wide range of substrate possibilities and makes OTFTs an
attractive technology for many low-cost electronics applications, particularly
those that require or may benefit from flexible polymeric substrates such as rf
identification tags, smart cards, electronic paper, and flat panel displays. In
the case of flat panel displays, the integration of OTFTs on polymeric
substrates with liquid crystal materials or organic light emitters allows
active matrix liquid crystal displays AMLCDs or active matrix organic light
emitting diode displays that are flexible, lightweight,
inexpensive, and rugged.
Our
pentacene thin-film transistors TFTs are typically slightly depletion mode and
have significant off-state leakage through the pentacene layer. This leakage
greatly reduces
On/off current ratio, an important
device parameter for active matrix displays, and can be eliminated by
patterning the pentacene active layer. To pattern the active layer without
significantly degrading the pentacene, water-based polyvinyl alcohol PVA
Photosensitized with ammonium dichromate was used. The PVA is applied by spin
coating and photolithographically patterned to form an etch mask. The pentacene
layer outside the active device regions is then removed with an oxygen plasma.
Introduction
For more than a decade now, organic thin-film
transistors (OTFTs) based on conjugated polymers, oligomers, or other molecules
have been envisioned as a viable alternative to more traditional, mainstream
thin-film transistors (TFTs) based on inorganic materials. Because of the
relatively low mobility of the organic semiconductor layers, OTFTs cannot rival
the performance of field-effect transistors based on single-crystalline
inorganic semiconductors, such as Si and Ge, which have charge carrier
mobilities (u) about three orders of magnitude higher.
Consequently,
OTFTs are not suitable for use in applications requiring very high switching
speeds. However, the processing characteristics and demonstrated performance of
OTFTs suggest that they can be competitive for existing or novel
thin-film-transistor applications requiring large-area coverage, structural
flexibility, low-temperature processing, and, especially, low cost. Such
applications include switching devices for active-matrix flat-panel displays
(AMFPDs) based on either liquid crystal pixels (AMLCDs) or organic
light-emitting diodes (AMOLEDDs). At present, hydrogenated amorphous silicon
(a-Si:H) is the most commonly used active layer in TFT backplanes of AMLCDs.
The higher performance of polycrystalline silicon TFTs
is usually required for well-performing AMOLEDDs, but this field is still in
the development stage; improvements in the efficiency of both the OLEDs and the
TFTs could change this requirement. OTFTs could also be used in active-matrix
backplanes for “electronic paper” displays based on pixels comprising either
electrophoretic ink-containing microcapsules or “twisting balls”. Other
applications of OTFTs include low-end smart cards and electronic identification
tags.
There are at least four ways in which a new, exploratory
technology such as OTFTs can compete with or supplement
a widely used, entrenched technology such as (a-Si:H) TFTs, for which many
billions of dollars have already been invested:
1. By far surpassing the performance of the entrenched technology
and offering a substantial performance advantage.
2. By enabling an application
that is not achievable using the entrenched technology, taking advantage of one
or more unique properties or processing characteristics of OTFTs. An example
for Case 2 could be a flexible AMFPD fabricated on a plastic substrate. Because
of the high processing temperature used in a-Si:H deposition (approximately
3608C), which is required for the fabrication of well-performing a-Si:H TFTs,
it is not possible to fabricate an AMLCD based on such TFTs on a transparent
plastic substrate. OTFTs, which can be processed at or close to room
temperature and thus are compatible with transparent plastics, are an enabling
technology which complements the entrenched technology instead of competing
with it.
3. By significantly reducing the cost of manufacturing OTFTs as
compared to mainstream TFTs while delivering similar performance.
4. By leveraging a potential
reduced cost advantage to create a new way of using an existing application, or
to change the usage pattern or user habit for an existing application, even if
performance is lower than that of the entrenched technology. An example for
Case 4 could be a large area AMFPD which uses a backplane comprising OTFTs that
have been fabricated using very low-cost processes compared to a-Si:H TFTs.
Because of its significantly reduced cost, such a display could have a
substantially reduced lifetime compared to a conventional AMFPD, since the user
would be able to replace it several times over a period equal to the lifetime
of a more expensive, conventional AMFPD.
Various forms of OTFTs can be applicable in all four modes of
competition with the entrenched technology described above. Depending on the
design of the OTFT and the specific materials and processes used to manufacture
it, the cost and performance of the OTFT can vary substantially. In this
literature review an effort is made to describe this broad spectrum of materials,
fabrication processes, designs, and applications of OTFTs, with an emphasis on
papers published during the last three years. Older papers that, in the
authors’ opinion, played a very important role in shaping the OTFT field are
also included, but the reader should look up a number of previously published
review papers that cover that early period in more detail.
Conduction mechanisms and a potential fundamental limit to charge-carrier
mobility in organic semiconductors
The upper limits in microscopic mobilities of organic
molecular crystals, determined at 300 K by time-of-flight experiments, are
falling between 1 and 10 .The
weak intermolecular interaction forces in organic semiconductors, most usually
vander Waals interactions with energies smaller than 10
kcal mol 21, may be responsible for this limit, since the vibrational
energy of the molecules reaches a magnitude close to that of the intermolecular
bond energies at or above room temperature. In contrast, in inorganic
semiconductors such as Si and Ge, the atoms are held together with very strong
covalent bonds, which for the case of Si have energies as high as 76 kcal mol21. In these semiconductors, charge
carriers move as highly delocalized plane waves in wide bands and have a very
high mobility, as mentioned above . The mobility is limited due to the
scattering of carriers by lattice vibrations, and thus is reduced as
temperature increases. Band transport is not applicable to disordered organic
semiconductors, in which carrier transport takes place by hopping between
localized states and carriers are scattered at every step.
Hopping is assisted by phonons and mobility increases with
temperature, although it is very low overall . The
boundary between band transport and hopping is defined by materials having
mobilities between . Highly
ordered organic semiconductors, such as several members of the acene series
including anthracene and pentacene, have room temperature mobilities in this
intermediate range, and in some cases temperature-independent mobility has been
observed, even in polycrystalline thin films of pentacene. That observation was
used to argue that a simple temperature-activated hopping mechanism can be
excluded as a transport mechanism in high-quality thin films of pentacene. At
low temperatures (below approximately 250 K), band transport becomes the
mechanism that takes control of carrier transport in single crystals of pentacene
and other acenes. Very high mobility values have been
reported.
At these temperatures, the vibrational energy is much lower than the
intermolecular bonding energy and phonon scattering is very low; thus, high
mobility is exhibited. At or close to room temperature, phonon scattering
becomes so high that the contribution of the band mechanism to transport
becomes too small. At these same temperatures, hopping begins to contribute to
carrier transport. Hopping of carriers from site to site becomes easier as the
temperature rises. The combination of these two mechanisms explains the fact
that the mobility decreases as temperature rises from a few degrees K to about
250 K, and after that the mobility begins to rise slowly.
This behavior is difficult or impossible to observe in
polycrystalline films, in which traps attributed to structural defects dominate
transport. Interestingly, a recent work reports thermally activated transport
for single crystals of pentacene, quaterthiophene, and hexathiophene isolated
from polycrystalline films, which was attributed to Coulomb blockade-dominated
transport. However, in the same work it was predicted that for materials with
reduced tunnel resistance between the molecules, the Coulomb blockade model
breaks down; as a result, mobilities greater than and exhibiting temperature independent
behavior should be attainable. This is the case for the pentacene sample in
which exhibited a mobility of and had a temperature-independent mobility,
in contrast to the sample having lower mobility and
exhibiting thermally activated transport, a behavior that was attributed to
thermally activated hopping conduction.There may be a reasonable explanation
for the fact that the apparent mobility of the pentacene single crystal
measured is lower than the mobility of some polycrystalline films. It is
possible that a trap infested region is formed in the pentacene adjacent to the
bottom electrodes.
We have shown that when pentacene is deposited on Au, a
microcrystalline, defect-infested region is formed in the channel, at and close
to the edge of the gold electrode. As a result of the existence of this region,
there is a large concentration of traps close to the Au contact which dominates
the carrier transport and drastically lowers the apparent mobility.
These traps are also responsible for the gate-voltage dependence of the mo of
pentacene,. It is worth noting that the devices had their source and drain
electrodes deposited on top of the pentacene layer through a mask. We can
propose two possible ways of eliminating the potential fundamental limit at
about 10 for the mobility of OTFTs, imposed by the
weak intermolecular forces acting among nearest-neighbor (nn) molecules. One is
to strengthen such interaction. This can be done by creating a stronger bond
between nn molecules. However, this must take place without breaking the
conjugation of the molecules. Stronger intermolecular bonds would result in
stiffer crystalline structures, and thus it would take temperatures higher than
room temperature to generate substantial scattering of highly delocalized
carriers by lattice vibrations. Using such a strategy, one could, in effect,
produce at room temperature the high mobility that exists at very low
temperatures in crystals of the acene series (e.g., pentacene). A second way
would require more drastic change in the conduction path and mechanism. It
would involve carrier transport along a single macromolecule that would bridge
the gap between the sources and drain electrodes of a TFT. Intermolecular
conduction would give way to intramolecular conduction. It is well known that
the mobility along the long axis of conjugated conducting and semi conducting
polymers (e.g., polyacetylene) can reach values of 1000
or more. This may require a drastic reduction
in the size of the TFT channel from micron-size channels containing a large
number of molecules to nano-size channels that are transcended by a single
molecule. In the former case, conduction depends upon intermolecular transport,
while in the latter, conduction takes place through the conjugated backbone of
a single molecule and thus is intramolecular. The successful execution of at
least one of the above strategies would prove that although limits can be
imposed by the design and size of OTFT devices, they are not fundamental.
Structure:
A typical OTFT structure is shown in
Figure a. In its simplest form, an OTFT comprises a conductive gate (which
could be the substrate) covered by a thin dielectric film that is interfaced to
the organic active layer. The layer is generally made of semi-CPs, oligomers,
or small molecules, such as
regioregular polythiophenes or pentacene, which are deposited as films (a few
tens of nanometers thick) by solution casting or sublimation. These are
generally polycrystalline films composed of contiguous grains, which have
linear dimensions of a few hundred nanometers.
Figure 1b is an atomic force
micrograph of a pentacene thin-film organic semiconductor. A sketch of the
energy barrier EB at a grain boundary is also shown. Source and drain
contacts to the organic active layer are defined by thermal evaporation through
a screen-mask; the conducting substrate (heavily doped silicon) is used to
impose the gate bias. Gold is the most convenient contact metal because its
work function is the closest to that of most p-type organic materials. The
patterning of the organic material to confine such an active layer in the
channel region (the area between the source and drain electrodes) is crucial to
eliminating parasitic leakage currents and achieving better device performance.
Modeling of the electrical characteristics of OTFTs
The majority of organic semiconductors exhibit p-type
behavior; i.e., the majority carriers are holes (h1). Their I–V characteristics
can be adequately described by models developed for inorganic semiconductors. An
a–v-dihexylhexathiophene (DH6T) TFT is used here to describe typical organic
TFT device characteristics and the methods used to calculate the mobility and
Ion/Ioff ratio.
Here using DH6T as the semiconductor, 3700 Å
vapor-deposited parylene-C as the gate insulator, aluminum gate, and gold
source and drain electrodes. When the gate electrode is biased negatively with
respect to the grounded source electrode, DH6T insulated gate field-effect
transistors (IGFETs) operate in the accumulation mode and the accumulated
charges are holes. Figure 3(a) shows a typical plot of drain current ID versus
drain voltage VD at various gate voltage VG
At low VD,
ID increases linearly with VD (linear regime) and is approximately determined
from the following equation Where L is the channel length, W is the channel width, Ci is the
capacitance per unit area of the insulating layer, VT is the threshold voltage,
and m is the field-effect mobility.
The latter can be calculated in the linear regime from
the transconductance, by plotting ID versus VG at a constant low VD and
equating the value of the slope of this plot to gm.
which corresponds
to Figure 3(a), shows such a plot, and the calculated mobility value is 0.122 at VD is 22 V. The value of VD is chosen so
that it lies in the linear part of the ID versus VD curve. For this device, L was
equal to 137 mm and W was equal to 1 mm. Other devices from the same substrate
produced field-effect mobilities ranging from 0.095 to
0.131.
When the gate electrode is biased positively, DH6T
IGFETs operate in the depletion mode, and the channel region is depleted of
carriers. The current modulation (the ratio of the current in the accumulation
mode over the current in the depletion mode, also referred to as Ion/Ioff) for
the device is slightly above 104 when VG is scanned from 220 to 16 V .
For VD more negative than VG ,
ID tends to saturate (saturation
regime) owing to the pinch-off of the accumulation layer, and is modeled by the
equation.
In the saturation regime, m can be calculated from the slope of the
plot of uIDu1/2 versus VG. For the same device
as in Figure 3, the mobility calculated in the saturation regime was 0.09 . Pentacene
also exhibits typical p-type semiconductor characteristics.
Figure shows a graph that contains an ID versus VG plot and an uIDu1/2 versus VG plot .It corresponds to a device
with channel length L 5 4.4 mm and width W 5 1500 mm, and utilizing pentacene
as the semiconductor, 0.5-mm-thick thermally grown SiO2 as the gate insulator,
heavily doped Si (n-type) as the gate electrode, and gold source and drain
electrodes.
The fieldeffect mobility m was 0.16 cm2 V21 s21, while the threshold
voltage VT was about 230 V. The Ion/Ioff ratio was above 107 when VG was
scanned
from 2100 to 180 V. The measured mobility value is in agreement with
reported hole mobilities from IGFETs based on pentacene films grown at room
temperature. The mobility from devices with lower W/L ratios was considerably
higher and reached 0.25 for devices with W/L
5 3.5 mm owing to fringe currents outside the channel.
It is important that W/L be close to 10 or higher in
order to minimize the effects of such currents; otherwise, the mobility is
overestimated. An alternative way to achieve this would be to pattern the
semiconductor so that its width does not exceed the width of the channel.
Differences can often be observed in mobility values calculated in the linear
region and the saturation region. The linear region mobility can be affected by
contact problems, and in such cases there are departures from the linearity of
the ID versus VD curve which can lead to underestimation of mobility. In the
saturation regime, when channel lengths are comparable to the gate insulator
thickness or only a few times greater than that thickness, the ID versus VD
curves do not saturate and exhibit an upward trend at high VD. Calculating the
mobility in the saturation region from such devices can lead to erroneously
high values.
Vacuum-deposited organic semiconductor Films
Pentacene TFTs have produced the highest performance among TFTs with
an organic semiconducting channel. However, the operating voltage required to
produce such performance (100 V) was too high, especially for portable
applications that run on batteries. In a recent paper we studied the
gate-voltage dependence of mobility in pentacene devices and used our
understanding to demonstrate high-performance pentacene TFTs exhibiting high
mobility and good current modulation at low operating voltages. For this
purpose we employed a relatively high-dielectric-constant metal oxide film,
barium zirconate titanate (BZT), as a gate insulator. Our devices were
fabricated using an all-room-temperature process. Additionally, we demonstrated
full compatibility with transparent plastic substrates by fabricating devices
on such substrates.
Figures 5(a) and 5(b) respectively show the dependence
of field-effect mobility u on the charge per unit area on the semiconductor
side of the insulator QS, and the gate field E. The solid circles correspond to
a pentacene-based device with a 0.12-mm-thick SiO2 gate insulator thermally
grown on the surface of a heavily doped n-type Si wafer that acted as the gate
electrode. The open circles correspond to a similar device with a 0.5-mm-thick
SiO2 gate insulator.
The mobility for the SiO2-based devices is calculated in
the saturation regime using a gate sweep, as explained in Figure 4, and is then
plotted versus the maximum VG used in each gate sweep. The maximum VG is varied
from 220 to 2100 V. During all sweeps VD is kept constant at 2100 V in order to
eliminate any effects that source and drain contact imperfections might have on
our results. The mobility increases linearly with increasing QS and E and
eventually saturates.
QS is a function of the concentration of accumulated
carriers in the channel region (N). Since the accumulation region has been
shown in the past to be two-dimensional and confined very closely to the
interface of the insulator with the organic semiconductor all of this charge is
expected to be localized within the first few semiconductor monolayer from this
interface. An increase in VG results in an increase in E and N. However, for
the same VG, N depends on both the dielectric constant and the thickness of the
gate insulator, while E depends only on its Figure 5 Dependence of field-effect
mobility on (a) the charge per unit area on the semiconductor side of the
insulator QS, and (b) the gate field E for pentacene OTFTs with different gate
insulators.
By replacing SiO2 with an insulator having a similar
thickness but a much higher dielectric constant, we facilitated charge
accumulation. An accumulated carrier concentration similar to the SiO2 case
could be attained at much lower VG, and hence E, with all of the other
parameters being similar. If mobility depends on N rather than E, a high
mobility should be achieved in the devices comprise the
high-dielectric-constant gate insulator at much lower VG, and hence E, than
TFTs using a comparable thickness of SiO2. Indeed, this is what we observe in
Figure 5(b). The squares in Figure 5 correspond to devices comprising
room-temperature sputtered BZT as the gate insulator. The solid squares are
generated by gate sweeps, while the open squares are generated by drain sweeps.
From Figure 5(b) it is obvious that the applied gate field used in BZT-based
devices to obtain mobility values similar to those of the SiO2-based devices
was about five times lower than the fields used in the latter devices.
This clearly proves that high field is not required to
obtain high mobility. Thus, the gate-voltage dependence of mobility in these
devices is due to the higher concentration of holes accumulated in the channel,
which was achieved with the use of insulators having a higher dielectric
constant. Figure 5(a), which plots m versus charge per unit area, QS, shows
exactly that. The values of QS and N required to reach a certain mobility value
are practically the same for SiO2- and BZT based devices, although much different
gate field values were required to obtain such mobility in each case.
To prove the compatibility of our device-fabrication
processes with transparent plastics, we have reported the successful
fabrication of pentacene-based TFTs on thin, flexible polycarbonate substrates
.The BZT gate insulator used was 0.128 mm thick. The performance of these TFTs
was similar to that of devices fabricated on quartz or SiO2/Si substrates. Figure 6(a) shows the characteristics of such a device (W 5 1500 mm, L 5 69.2 mm) .Mobility was 0.2 as calculated in the saturation region.
Mobility values as high as 0.38 were
measured from devices with a W/L ratio of 4. These are the highest reported mobilities from devices fabricated on
transparent plastic substrates and operating at a maximum voltage of only 4 V.
In organic semiconductors, both the properties of the
individual molecules and the structural order of the molecules in the film
determine the macroscopic properties of the material. These properties can be
controlled by using molecular engineering to synthesize molecules with optimal
characteristics and by controlling the conditions under which these molecules
assemble to form the solid. In the case of chain- or rod-like molecules, which
have one molecular axis much longer than the other two, large p-conjugation
length along the long axis and close molecular packing of the molecules along
at least one of the short molecular axes are two important conditions for high
carrier mobility. Figure 7 contains proof of the above claims. By growing
amorphous films of pentacene, which is achieved by keeping the substrate
temperature low during deposition, we make a film that is practically
insulating.
When the substrate temperature is kept at room
temperature during deposition, a very well-ordered film is deposited, and the
mobility measured at room temperature is very high for an organic semiconductor
(0.6). Since the
structure of this thin film is different from the structure of single crystals
of pentacene, we must distinguish between a “thin-film phase” and a
“single-crystal phase” of pentacene. When a mixture of the thin-film phase and
the single-crystal phase is grown, the mobility is very low, possibly because of
the high defect concentration resulting from the coexistence of the two phases
Pentacene transistor drain–source contacts can be made in one of two
configurations [Figures 2(a) and 2(b)]: top contact and bottom contact. The
performance of pentacene devices with the bottom-contact configuration is
inferior to that of devices with the top-contact configuration. Consequently,
most high-performance pentacene TFTs reported in the literature have the
topcontact configuration, and shadow masking is generally used to pattern the
source and drain contacts on top of the
pentacene. This is a process that cannot be used in manufacturing. A process
that allows the photolithographic patterning of the source and drain electrodes
on the insulator before the deposition of pentacene, according to the schematic
shown in Figure 2(b), had to be developed. Furthermore, the performance of
devices fabricated with such a process should be similar to or better than that
of top-contact devices.
Figure 8 shows a pentacene layer as it was grown on SiO2
and a Au electrode. The edge between the SiO2 and the Au in the middle
photograph is marked by the end of the white (Au) area (due to variations in
image contrast, the pentacene-covered Au appears different in the top two pictures).
On SiO2, far away from the Au edge, pentacene consists of fairly large grains
(having sizes between 0.2 and 0.5 mm). On Au the grain size falls dramatically.
Close to the Au edge but on the SiO2 side, there is a transition region where
the grain size increases with increasing distance from the edge. In an organic
TFT, the structure and contact behavior of the film formed on top of most of
the electrode is not important for the performance of the device in the channel.
It is the crystalline structure of pentacene at the electrode edge which causes
the performance limitation of the bottom-contact TFT. Right at the edge of the
Au electrode, there is an area with very small crystals and hence a large
number of grain boundaries. Grain boundaries contain many morphological
defects, which in turn are linked to the creation of charge-carrier traps with
levels lying in the bandgap. These defects can be considered responsible for
the reduced performance of bottom-contact pentacene TFTs. Their elimination should
result in bottom-contact devices with performance similar to or better than
that of top-contact devices. In a typical bottom-contact pentacene TFT, the
mobility is equal to or less than 0.16 . We have used a self-assembled monolayer
(SAM) of 1-hexadecane thiol to modify the surface energy of the Au electrode in
an effort to improve the crystal size and ordering of the pentacene
overgrowth.1 The mobility calculated from such devices is 0.48 , which is three times larger than the
mobility of the device with untreated Au electrodes. The pentacene layers for
both devices were deposited in the same deposition run.
Usually shadow
masks are used during deposition to pattern the material. A technique was
recently proposed which uses topographic discontinuities to isolate individual
devices. This technique requires that the semiconducting material and the
photoresist remain in inactive areas, which can be a severe limitation for many
applications. We have developed a subtractive technique in which pentacene is
protected from the consequent lithographic steps by means of a chemically
resistant layer.2 A 1-um-thick layer of parylene-N is first used to protect the
sensitive pentacene layer from the solvents and other materials used. The
two-layer structure thus formed is then etched using a typical lithographic
process.
Advantages of Organic Electronics
The
advantages of organic electronics are well known.Organic thin-film transistors (OTFTs)
are field-effect devices with organic or polymer thin-film semiconductors as channel
material. They can act as multiparametric sensors with remarkable response
repeatability, and as semi-CPbased sensing circuits. Color-coded plots of OTFTs
responses after 13 h of exposure to alcohols are shown on the previous page.
Standard deviations are <2% because full device recovery can be achieved at
room temperature by strategic control of the gate bias. In addition, OTFT
response can be enhanced through the proper choice of the imposed gate bias
potentials. Some more advantages are:
·
Thin, light weight, flexible
·
Low voltage, Low power emissive
source
·
High resolution
·
Low fabrication cost
·
It doesn't require a glass
substrate as amorphous silicon does
·
Low temperature manufacture
·
Could be made on a piece of
plastic
·
The deposition technique could
reduce cost
Challenges and drawbacks
The rapid
development of organic electronics and improvements in the compatibility of
OTFTs and microfluidics opens wide horizons for the use of OTFTs in compact
sensing systems or biochips. However, several issues are still open,
particularly those related to the very long term stability and the
batch-to-batch or even device-to-device variability that will determine whether
this technology will move beyond the laboratory stage.
- OTFT are not suitable for very high switching speed application
- Since the magnitude of voltage is high and reverse recovery time is high
Conclusions
There has been tremendous progress in OTFT performance
during the last decade. At present, we have reached the point at which an
initial product application can be seriously considered. Organic semiconductors
such as pentacene, deposited by vacuum sublimation, remain the best performers
because of their very well ordered structures, resulting from the use of this
highly controllable deposition method. However, substantial improvements have
taken place in solution-processed organic semiconductors, and their mobilities
are currently only one order of magnitude lower than those of vapordeposited
pentacene TFTs. There is a potentially important cost advantage associated with
the solution processing of organic TFTs, because it eliminates the need for
expensive vacuum chambers and lengthy pump-down cycles. However, for this
advantage to be realized, all or at least most of the layers comprising the TFT
device should be deposited using methods that do not involve vacuum deposition.
These layers include the source, drain, and gate electrodes that currently are
fabricated from highwork-function metals, the gate dielectric, and the
(potentially necessary for some materials) passivation/ encapsulation layer.
Reel-to-reel processing, which is the most promising fabrication process for
reducing costs, can be applied to both vacuum- and solution-deposited organic
semiconductors; thus, it does not constitute an exclusive advantage for either
of the two classes of materials. All in all, organic TFTs are close to passage
from the research laboratory to product development and then to manufacturing
of new products based on organic semiconductors.
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